View WINC1500-MR210PA-14_8179359.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

atmel-42376a-atwinc1500-mr210p-smartconnect-datasheet_102014 description the atwinc1500-mr210pa is a low-power consumption 802.11 b/g/n iot (internet of things) module which is specifically optimized for low power iot applications. the highly integrated module features small form factor (21.72mm x 14.73mm x3.5mm) while fully integrat ing power amplifier, lna, switch, power management and pcb antenna. with seam less roaming capabilities and advanced security, it could be interoperable with various ve ndors' 802.11b/g/n access points in wireless lan. the module provides spi and uart to interface to host controller. features key features of the atwinc1500-mr210pa: ? ieee 802.11 b/g/ n rf/ph/mac soc ? ieee 802.11 b/g/n (1x1 ) for up to 72mbps ? single spatial stream in 2.4ghz rf band ? integrated pa and t/r switch ? integrated pcb antenna ? superior sensitivity and range vi a advanced phy signal processing ? advanced equalization and channel estimation ? advanced carrier and timing synchronization system features of the atwinc1500-mr210pa: ? wi-fi direct and soft-ap support ? supports ieee 802.11 we p, wpa, wpa2 security ? on-chip memory management engine to reduce host load ? i/o operating voltage of 2.7v to 3.6v ? operating temperature range of -30c to +85c ? integrated flash memory for system software ? spi and uart host interfaces ? power save modes: ? 4 a deep power down mode typical @3.3v i/o ? 850 a doze mode (chip settings are preserved. used for beacon monitoring mode) ? on-chip low power sleep oscillator ? fast host wake-up from doze mode by a pin or spi transaction atmel atwinc1500-mr210pa ieee 802.11 b/g/n iot module preliminary datasheet
atmel atwilc1500-mr [p reliminary datasheet] atmel-42376a-atwinc1500-mr210p-smartconnect-datasheet_102014 2 ? fast boot options ? on-chip boot rom (firmware instant boot) ? spi flash boot (firmware patches and state variables) ? low-leakage on-chip memory for state variables ? fast ap re-association (150ms) ? on-chip network stack to off-load mcu ? integrated network ip stack to minimize host cpu requirements ? network features tcp, udp, dhcp, arp, http, ssl, and dns ? wi-fi security wep, wpa, wpa2 and wps ? small footprint host driver (4kb flash ? less than 1kb ram)
3 atmel atwilc1500-mr [p reliminary datasheet] atmel-42376a-atwinc1500-mr210p-smartconnect-datasheet_102014 1. ordering information figure 1-1. atwinc1500-mr210pa ordering information details 1.1 regulatory certificates the product is a pre-tested module ce rtified to fcc part 15, ce and telec. $7:,1& 05 3 05,qgxvwuldo 1r27$qrvklhog 1r27$zlwkvklhog 27$zlwkvklhog 27$qrvkhlog *+] %odqn7ud\sdfnlqj 5hylvlrqohwwhu 1rdqwhqqd 33&%dqwhqqd 1r)(0 )(0 'hylfhqdph
atmel atwilc1500-mr [p reliminary datasheet] atmel-42376a-atwinc1500-mr210p-smartconnect-datasheet_102014 4 2. block diagram figure 2-1. atwinc1500-mr210p block diagram 3. general specifications 3.1 wi-fi rf specification $wpho:,1&$ %*162& %$/81 , & 63,b&)* 63, *3,2 *3,2 *3,2 ,541 &klsb(1 :$.( 5(6(7 *1' /rdg 6zlwfk 9'',2 9 9%$7 5;7; 0k]fu\vwdo 3ulqwhg*+] dqwhqqd 6zlwfklqj 5hjxodwru 9%$7 &klsb(1 &klsb(1 9'',2 table 3-1. conditions: vbat=3.6v; vddio=3.3v; temp: 25 ? c feature description module part number atwinc1500-mr210p wlan standard ieee 802.11b/g/n, wi-fi compliant host interface spi, uart dimension l x w x h: 21.72 x 14.73 x 3.5 (typical) mm frequency range 2.412ghz ~ 2.4835ghz (2.4ghz ism band) number of channels 11 for north america, 13 for europe, and 14 for japan modulation 802.11b: dqpsk, dbpsk, cck 802.11g/n: ofdm /64- qam,16-qam, qpsk, bpsk
5 atmel atwilc1500-mr [p reliminary datasheet] atmel-42376a-atwinc1500-mr210p-smartconnect-datasheet_102014 output power 802.11b /11mbps: 19dbm 1db 802.11g /54mbps: 15.5dbm 1db @ evm -28db 802.11n /65mbps: 13dbm 1db @ evm -30db receive sensitivity (11n, 20mhz) @10% per ? mcs=0 per @ -90dbm 1db ? mcs=1 per @ -86dbm 1db ? mcs=2 per @ -84dbm 1db ? mcs=3 per @ -81.5dbm 1db ? mcs=4 per @ -78dbm 1db ? mcs=5 per @ -74dbm 1db ? mcs=6 per @ -72.5dbm 1db ? mcs=7 per @ -71.5dbm 1db receive sensitivity (11g) @10% per ? 6mbps per @ -91dbm 1db ? 9mbps per @ -89dbm 1db ? 12mbps per @ -88.5dbm 1db ? 18mbps per @ -86.5dbm 1db ? 24mbps per @ -84dbm 1db ? 36mbps per @ -78.5dbm 1db ? 48mbps per @ -77dbm 1db ? 54mbps per @ -75dbm 1db receive sensitivity (11b) @8% per ? 1mbps per @ -98dbm 1db ? 2mbps per @ -95dbm 1db ? 5.5mbps per @ -93dbm 1db ? 11mbps per @ -89dbm 1db data rate 802.11b: 1, 2, 5.5, 11mbps 802.11g: 6, 9, 12, 18, 24, 36, 48, 54mbps data rate (20mhz, normal gi, 800ns) 802.11n: 6.5, 13, 19.5, 26, 39, 52, 58.5, 65mbps data rate (20mhz, short gi, 400ns) 802.11n: 7.2, 14.4, 21.7, 28. 9, 43.3, 57.8, 65, 72.2mbps maximum input level 802.11b: 0dbm typical 802.11g/n: -5dbm typical operating temperature -30c to 85c table 3-1. conditions: vbat=3.6v; vddio=3.3v; temp: 25 ? c (continued) feature description
atmel atwilc1500-mr [p reliminary datasheet] atmel-42376a-atwinc1500-mr210p-smartconnect-datasheet_102014 6 3.2 voltages 3.2.1 absolute maximum ratings 3.2.2 recommended operating ratings storage temperature -40c to 85c humidity operating humidity 10% to 95% non-condensing storage humidity 5% to 95% non-condensing table 3-1. conditions: vbat=3.6v; vddio=3.3v; temp: 25 ? c (continued) feature description table 3-2. voltages symbol description min typical max unit vbat input supply voltage -0.3 5.0 v vddio i/o voltage -0.3 4.6 v table 3-3. recommended operating ratings symbol test conditions min typical max unit vbat -30 ? c - +85 ? c 3.0 3.6 4.2 v vddio -30 ? c - +85 ? c 2.7 3.3 3.6 v
7 atmel atwilc1500-mr [p reliminary datasheet] atmel-42376a-atwinc1500-mr210p-smartconnect-datasheet_102014 4. pin assignments 4.1 top view figure 4-1. top view 4.2 pin descriptions 63,b&)* :$.( *1'b ,451 8$57b7;' 63,b026, 63,b661 63,b0,62 63,b6&. 63,b5;' 9%$7 1& 1& 1& 1& *3,2b &+,3b(1 9'',2 - - - *1'b - - - - - - - - - - - - - - - - - - - - - - - - - 39b73 1& *3,2b *3,2b *1' *3,2b ,&b6&/ ,&b6'$ 5(6(7b1 table 4-1. pin descriptions pin # pin name type description programmable pull-up resistor 1 gpio_18 i/o general purpose i/o. yes 2 i2c_scl i/o i 2 c slave clock. currently used only for atmel debug. not for customer use. leave unconnected. yes 3 i2c_sda i/o i 2 c slave data. currently used only for atmel debug. not for customer use. leave unconnected. yes
atmel atwilc1500-mr [p reliminary datasheet] atmel-42376a-atwinc1500-mr210p-smartconnect-datasheet_102014 8 4 reset_n i active-low hard reset. when asserted to a low level, the module will be placed in a reset state. when asserted to a high level, the module will run normally. connect to a host output that defaults low at power up. if the host output is tri-stated, add a 1m ? pull-down resistor to ensure a low level at power up. no 5 nc - no connect 6 nc - no connect 7 nc - no connect 8 nc - no connect 9 gnd_1 - gnd 10 spi_cfg i tie to vddio through a 1m ? resistor to enable the spi interface no 11 wake i host wake control. can be used to wake up the module from doze mode. connect to a host gpio. no 12 gnd_2 - gnd 13 irqn o atwinc1500-mr210pa device interrupt output. connect to host interrupt input pin. no 14 uart_txd o uart transmit output from atwinc1500-mr210p yes 15 spi_rxd i spi mosi (master out slave in) pin yes 16 spi_ssn i spi slave select. active low yes 17 spi_txd o spi miso (master in slave out) pin yes 18 spi_clk i spi clock yes 19 uart_rxd i uart receive input to atwinc1500-mr210p yes 20 vbatt - battery power supply 21 gpio_1 i general purpose i/o yes 22 chip_en i module enable. high level enables module, low level places module in power down mode. connect to a host ou tput that defaults low at power up. if the host output is tri-stated, add a 1m ohm pull-down resistor to ensure a low level at power up. no 23 vddio - i/o power supply. must match host i/o voltage 24 1p3v_tp - 1.3v vdd core test point. leave unconnected 25 nc - no connect 26 gpio_15 i/o general purpose i/o yes 27 gpio_16 i/o general purpose i/o yes 28 gnd_3 - gnd table 4-1. pin descriptions (continued) pin # pin name type description programmable pull-up resistor
9 atmel atwilc1500-mr [p reliminary datasheet] atmel-42376a-atwinc1500-mr210p-smartconnect-datasheet_102014 5. host interfaces 5.1 i 2 c interface 5.1.1 overview atmel atwinc1500-mr210p provides an i 2 c bus slave that allows the host processor to read or write any register in the chip. the atwinc1500-mr210p supports i 2 c bus version 2.1 - 2000. the i 2 c interface, used primarily for contro l, is a two-wire serial interface consisting of a serial data line (sda, pin 17) and a serial clock (scl, pin 18). it respond s to the seven bit address value 0x60. the atwinc1500- mr210p i 2 c interface can operate in standard mode (with data rates up to 100kb/s) and fast mode (with data rates up to 400kb/s). the i 2 c is a synchronous serial interface. the sda line is a bidirectional signal and changes only while the scl line is low, except for stop, start, and restart cond itions. the output drivers are open-drain to perform wire-and functions on the bus. the maximum number of devices on the bus is limited by only the maximum capacitance specification of 400pf. da ta is transmitted in byte packages. for specific informat ion, please refer to the philip s specification entitled "the i 2 c -bus specification, version 2.1". 5.1.2 i 2 c timing the i 2 c is provided in figure 5-1 and in table 5-1 on page 9 . figure 5-1. atwinc1500-mr210p i 2 c timing diagram table 5-1. atwinc1500-mr210p i 2 c timing parameters parameter symbol min max units remarks scl clock frequency f scl 0 400 khz scl low pulse width t wl 1.3 s scl high pulse width t wh 0.6 s w +/ 6'$ 6&/ w +'67$ w :/ w :+ w 68'$7 w 35 w +''$7 w 35 w 35 w /+ w +/ w /+ w 68672 w %8) w 6867$ i 6&/
atmel atwilc1500-mr [p reliminary datasheet] atmel-42376a-atwinc1500-mr210p-smartconnect-datasheet_102014 10 5.2 spi interface 5.2.1 overview atmel atwinc1500-mr210p has a serial peripheral inte rface (spi) that operates as a spi slave. the spi interface can be used for control and for serial i/o of 802.11 data. the spi pins are mapped as shown in table 5-2 . the spi is a full-duplex slave-synchronous serial in terface that is available immediately following reset when pin 10 (spi_cfg) is tied to vddio. table 5-2. atwinc1500-mr210p spi interface pin mapping when the spi is not selected, i.e., when ssn is high , the spi interface will not interfere with data transfers between the serial-master and other serial-slave devices. when the serial slave is not selected, its transmitted data output is buffered, resulting in a high impedance drive onto the miso line. the spi interface responds to a protocol that allows an external host to read or write any register in the chip as well as initiate dma transfers. the spi ssn, mosi, miso and sck pins of the at winc1500-mr210p have internal programmable pull-up resistors (see ?programmable pull up resistors? on page 14 ). these resistors should be programmed to be disabled. otherwise, if any of the spi pins are driven to a low level while the atwinc1500-mr210p is in the low power sleep state, current will flow from the vddio supply through the pu ll-up resistors, increasing the current consumption of the module. scl, sda fall time t hl 300 ns scl, sda rise time t lh 300 ns this is dictated by external components start setup time t susta 0.6 s start hold time t hdsta 0.6 s sda setup time t sudat 100 ns sda hold time t hddat 0 ns slave and master default 40 ns master programming option stop setup time t susto 0.6 s bus free time between stop and start t buf 1.3 s glitch pulse reject t pr 0 50 ns table 5-1. atwinc1500-mr210p i 2 c timing parameters (continued) parameter symbol min max units remarks pin # spi function 10 cfg: must be tied to vddio 16 ssn: active low slave select 15 mosi(rxd): serial data receive 18 sck: serial clock 17 miso(txd): serial data transmit
11 atmel atwilc1500-mr [p reliminary datasheet] atmel-42376a-atwinc1500-mr210p-smartconnect-datasheet_102014 5.2.2 spi timing the spi timing is provided in figure 5-2 and in table 5-3 on page 11 figure 5-2. spi timing diagra m (spi mode cpol=0, cpha=0) table 5-3. spi slave timing parameters parameter symbol min max units clock input frequency f sck 48 mhz clock low pulse width t wl 15 ns clock high pulse width t wh 15 ns clock rise time t lh 10 ns clock fall time t hl 10 ns input setup time t isu 5 ns w /+ 6&. 7;' 5;' 661 w :+ w +/ w :/ w 2'/< w ,68 w ,+' i 6&. w 662'/< 661 w 68661 w +'661 63,0dvwhu 63,6odyh
atmel atwilc1500-mr [p reliminary datasheet] atmel-42376a-atwinc1500-mr210p-smartconnect-datasheet_102014 12 5.3 uart interface atmel atwinc1500-mr210p has a universal asynchronous receiver / transmitter (uart) interface available on pins j14 and j19. it can be used for control or dat a transfer if the baud rate is sufficient for a given application. the uart is compat ible with the rs-232 standard, where atwinc1500-mr210pa operates as data terminal equipment (dte). it has a two-pin rxd/txd interface. the uart features programmable baud rate generation with fractional clock division, which allows transmission and reception at a wide variety of st andard and non-standard baud rates. t he uart input clock is selectable between 10mhz, 5mhz, 2.5mhz, and 1.25mhz. the clock divider value is programmable as 13 integer bits and 3 fractional bits (with 8.0 being the smallest recomm ended value for normal operation). this results in the maximum supported baud rate of 10mhz / 8.0 = 1.25mbd. the uart can be configured for seven or eight bit operation, with or without parity, with four different parity types (odd, even, mark, or space), and with one or two stop bits. it also has rx and tx fifos, which ensure reliable high speed reception and low software overhead transmission. fifo size is 4 x 8 for both rx and tx direction. the uart also has status registers showing th e number of received characte rs available in the fifo and various error c onditions, as well the ability to generate interrupts based on these status bits. an example of uart receiving or trans mitting a single packet is shown in figure 5-3 on page 12 . this example shows 7-bit data (0x45), odd parity, and two stop bits. see the atwinc1500-mr210pa programming guide for information on configuring the uart. figure 5-3. example of uart rx or tx packet input hold time t ihd 5 ns output delay t odly 0 20 ns slave select setup time t sussn 5 ns slave select hold time t hdssn 5 ns table 5-3. spi slave timing parameters (continued) parameter symbol min max units
13 atmel atwilc1500-mr [p reliminary datasheet] atmel-42376a-atwinc1500-mr210p-smartconnect-datasheet_102014 5.4 host interface power- up sequence timing diagram figure 5-4. host interface powe r up sequence timing diagram 6. vddio load switch the atwinc1500-mr210p module is designed with a load switch in series with the vddio supply. the load switch is controlled by the chip_en pi n of the module (module pin 22). when chip_en is high, the load switch is turned on. when chip_en is low the load switch is open and vddio is disconnected from the atwinc1500- mr210p. when the vddio supply to the atwinc1500-mr210 pa is disconnected it is important that none of the pins to the atwinc1500-mr210pa is in a high state. figure 6-1 on page 14 shows the esd structure of the pins of the atwinc1500 and figure 6-2 on page 14 shows the current path through the esd diode from a pin that is being driven high to the vddio supply of the device . in effect, if vddio is disc onnected from the external power supply and a high level is driv en on to a pad of the device, the dev ice will be powered up through the pad.
atmel atwilc1500-mr [p reliminary datasheet] atmel-42376a-atwinc1500-mr210p-smartconnect-datasheet_102014 14 figure 6-1. atwinc1500 pad esd structure this shows why it is important that an y time chip_en to the module is low, all pins interfacing to the module must not be driven or pulled high. they should either be set to a low level or high impedance state. this means that if any external pull-up resistors are attached to an y pins they should be disconnected from the supply when chip_en is low. figure 6-2. current path through esd diode 7. notes on interfacing to the atwinc1500-mr210p 7.1 programmable pull up resistors the atwinc1500-mr210pa provides programmable pull-up resistors on various pins. the purpose of these resistors is to keep any unused input pins from floating which can cause excess current to flow through the input buffer from the vddio supply. any unused module pin on the atwinc1500-mr210p should leave these pull- up resistors enabled so the pin will not float. the default state at powe r up is for the pull- up resistor to be 9'',2 3dg $7:,1& ,23rzhu%xv '9'',2 3dg $7:,1& ,23rzhu%xv
15 atmel atwilc1500-mr [p reliminary datasheet] atmel-42376a-atwinc1500-mr210p-smartconnect-datasheet_102014 enabled. however, any pin which is used should have the pu ll-up resistor disabled. the reason for this is that if any pins are driven to a low level while the atwinc1500-mr210p is in th e low power sleep state, current will flow from the vddio supply through the pull-up resistor s, increasing the current consumption of the module. since the value of the pull-up resistor is approximately 100k ? , the current through any pull-up resistor that is being driven low will be vddio/100k. for vddio = 3.3v, the current through each pull-up resistor that is driven low would be approximately 3.3v/100k = 33a. pins which are used and have had the programmable pull-up resistor disabled should always be actively driven to either a high or low level and not be allowed to float. see the atwinc1500-mr210pa programming guide for information on enabling/disabling the programmable pull up resistors. 8. recommended footprint (unit: mm) figure 8-1. footprint drawing 9. rf performance pl acement guidelines it is critical to follow the recommendations lis ted below to achieve the best rf performance: ? module must be placed on main board - printed antenna area must overlap with the carrier board. the portion of the module containing the antenna should not stick out over the edge of the main board. the antenna is designed to work properly when it is sitt ing directly on top of a 1.5mm thick printed circuit board. ? if the module is placed at the edge of the main bo ard, a minimum 22mm by 5mm area directly under the an-tenna must be clear of all metal on all layers of the board. "in-land" placem ent is acceptable; however deep-ness of keep-out area must grove to: module edge to main board edge plus 5mm. do not place module in the middle of the main board or far away from the main board edge. ? keep away from antenna, as far as possible, large me tal objects to avoid electromagnetic field blocking. ? do not enclose the antenna within a metal shield. ? keep any components which may radiate noise or signa ls within the 2.4ghz - 2.5ghz frequency band far away from the antenna or better yet, shield those co mponents. any noise radiated from the main board in this frequency band will degrade the sensitivity of the module. ? please contact atmel for assistance if any other placement is required.
atmel atwilc1500-mr [p reliminary datasheet] atmel-42376a-atwinc1500-mr210p-smartconnect-datasheet_102014 16 10. recommended reflow profile referred to ipc/jedec standar d. peak temperature: <250 ? c number of times: 2 times maximum figure 10-1. typical re-flow profile
17 atmel atwilc1500-mr [p reliminary datasheet] atmel-42376a-atwinc1500-mr210p-smartconnect-datasheet_102014 11. module outline drawings figure 11-1. module drawings - top and bottom views (unit = mm)
atmel atwilc1500-mr [p reliminary datasheet] atmel-42376a-atwinc1500-mr210p-smartconnect-datasheet_102014 18 12. module schematic figure 12-1. atwinc1500-mr210pa schematic
19 atmel atwilc1500-mr [p reliminary datasheet] atmel-42376a-atwinc1500-mr210p-smartconnect-datasheet_102014 13. module bill of materials (bom) table 13-1. atwinc1500-mr210pa bill of material t]&]?z]ou}o]?zlu]???ovuo}?]?zv ??]v?v?vv z]?w&?]?u^??u?u?e d t/e?rdz?w z]?]}vw ,wh p 4w\ 5hihuhqfh 9doxh 'hvfulswlrq 0dqxidfwxuhu 3duw1xpehu )rrws ulqw ??u? x& &$3&(5x);59 3dqdvrqlf (&-(%-0 &6 ? ue w& &$3&(53)9;5 0xudwd *505+.$' &6 ?u?ueu?u?uu x& &$3&(5x);59 $9; ='.$7$ &6 ? ???& &$3&(5s)1329 0xudwd *50&+-= &6 ex& &$3&(58)9;5 0xudwd *505*0(' &6 ? ??u?e ?& &$3&(53)913 0xudwd *50&+5&$' &6 ? u w& &$3&(53)913 d?? *50&+)$' &6 ? ?u x?w& &$3&(53)913 0xudwd *50&+5&$' &6 ? & &$3&(58)9;5 0xudwd *505*0(' &6 ? 5(62+0:-80360' 3dqdvrqlf (5-*15& 56 ? x?w& &$3&(53)913 0xudwd *50&+5&$' &6 ?u?? e/ ? &u&?u&? >d?'?^e )(55,7(2+0#0+] 0xudwd %/0$*61 )%6 > ?x?, 32:(5,1'8&725x+p$rkpv 0xudwd /403150) 5/ /36 ? >?u>? ?x?v, ,1'8&7251+0$ 0xudwd /43711&' /6 z ?l 5(6.2+0:60' 3dqdvrqlf (5-5.); 56 z? x?w& &$3&(5s)1329 0xudwd *50&+5&$ &6 z? ?l 5(6.2+0:60' 3dqdvrqlf (5-5.); 56 ze e/ h dt/e?rdh ,&:l)l4)1 $wpho dt/e?rdh 4 )1 h? &dee 0+]p$6\qfkurqrxv6whs'rzq&rqyhuwhu )0' )7$d 627 h? e^>y ,&%866:,7&+6*/63670,&523$. )dlufklog 1&6=/; 8)')1 z ?xd, &5<67$/0+=3)60' ?}v $%00+='7 e^d w r dt/e?rdz?w ??l ^z]o r d?o^z]o ??l ed/z&^z]o? z]?]}vr/v]?]o?o??}??}?]}vx
atmel atwilc1500-mr [p reliminary datasheet] atmel-42376a-atwinc1500-mr210p-smartconnect-datasheet_102014 20 14. application schematic figure 14-1. application schematic
21 atmel atwilc1500-mr [p reliminary datasheet] atmel-42376a-atwinc1500-mr210p-smartconnect-datasheet_102014 15. technical support and resources for technical support and other resources visit: http://www.atmel.com/design-support
atmel atwilc1500-mr [p reliminary datasheet] atmel-42376a-atwinc1500-mr210p-smartconnect-datasheet_102014 22 16. revision history doc. rev. date comments 42376a 10/2014 initial document release.
i atmel atwilc1500-mr [p reliminary datasheet] atmel-42376a-atwinc1500-mr210p-smartconnect-datasheet_102014 table of contents description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1. ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 regulatory certificates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3. general specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3.1 wi-fi rf specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3.2 voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4. pin assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4.1 top view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4.2 pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5. host interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5.1 i2c interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5.2 spi interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5.3 uart interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.4 host interface power-up sequence timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6. vddio load switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7. notes on interfacing to the atwinc1500-mr210p . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7.1 programmable pull up resistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 8. recommended footprint (unit: mm) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 9. rf performance placement guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 10. recommended reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 11. module outline drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 12. module schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 13. module bill of materials (bom) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 14. application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 15. technical support and resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 16. revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i
x x xx x x atmel corporation 1600 technology drive, san jose, ca 95110 usa t: (+1)(408) 441.0311 f: (+1)(408) 436.4200 | www.atmel.com ? 2014 atmel corporation. / rev.: atmel-42376a-atwinc1500-mr210p-smartconnect-datasheet_102014. atmel ? , atmel logo and combinations thereof, enabling unlimited possibilities, and others are registered trademarks or trademarks of atmel corporation in u.s. and other countries. other terms and product names may be trademarks of others. disclaimer: the information in this document is provided in c onnection with atmel products. no license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of atmel products. except as set forth in the atmel terms and condit ions of sales located on the atmel website, atmel assumes no liability wh atsoever and disclaims any express, implied or statutory warranty relating to its p roducts including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or non-infringement. in no event shall atmel be liable for any direct, indirect, consequential, pu nitive, special or incidental damages (including, without limi tation, damages for loss and profits, business interruption, or loss of information ) arising out of the use or inability to use this document, even if atmel has been advised of the possibility of such damages. atmel makes no r epresentations or warranties with respect to the accuracy or c ompleteness of the contents of this document and reserves the right to make changes to specificatio ns and products descriptions at any time without notice. atmel d oes not make any commitment to update the information contained herein. unless specifically provided otherwise, atme l products are not suitable for, and shall not be used in, automo tive applications. atmel products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. safety-critical, military, and automotive applications disclaim er: atmel products are not designed for and will not be used in connection with any applications where the failure of such products would reasonably be expected to re sult in significant personal inju ry or death (?safety-critical a pplications?) without an atmel officer's specific written consent. safety-critical applications incl ude, without limitation, life support devices and systems, equipment or systems for t he operation of nuclear facilities and weapons systems. atmel products are not designed nor intended for use in military or aerospace applications or environments unless specifically designated by atmel as military- grade. atmel products are not designed nor intended for use in automot ive applications unless spec ifically designated by atmel as automotive-grade.

▲Up To Search▲

Price & Availability of WINC1500-MR210PA-14

	To Download WINC1500-MR210PA-14 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .